The VXIbus specification provides for two backplane protocols for communicating between modules, register-based and message-based. With register-based protocol a module directly addresses the target modules' registers by placing a the register address on the VXIbus backplane and reading or writing 8-, 16- or 32-bit binary data directly to the addressed devices registers. Depending on the modules involved this transaction may be as short as 100 ns. This protocol provides by far the highest performance. All Bustec modules use this protocol.
Message-based protocol is a vestige of rack and stack instrumentation and GPIB. With this protocol two 8-bit ASCii characters are passed over the backplane between modules on each bus cycle. The communication is in the form of a ASCii command string which is interpreted by the receiving module and an ASCii response string is returned. With each bus cycle the sender must check whether the receiving module is ready so as not to overwhelm the receiver. This protocol is very inefficient and is only capable of using a small fraction of the VXIbus bandwidth. The single virtue is its compatibility with older instrumentation. The remainder of this paper will only deal with register-based devices.